Description
Has your project outgrown the STM32F103C8 microcontroller on the “Blue Pill” dev board? Take a look at the F401 or F411 micros, with more flash, more RAM, higher clock speed, and hardware floating point. 100MHz, 512KB Flash, 128KB RAM, USB-C Connection.
- Dynamic Efficiency Line with BAM (Batch Acquisition Mode)
- 1.7 V to 3.6 V power supply
- – 40°C to 85/105/125 °C temperature range
- Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 100 MHz, memory protection unit, 125 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
- Memories
- 512 Kbytes of Flash memory
- 128 Kbytes of SRAM
- Clock, reset and supply management
- 1.7 V to 3.6 V application supply and I/Os
- POR, PDR, PVD and BOR
- 4-to-26 MHz crystal oscillator
- Internal 16 MHz factory-trimmed RC
- 32 kHz oscillator for RTC with calibration
- Internal 32 kHz RC with calibration
- Power consumption
- Run: 100 μA/MHz (peripheral off)
- Stop (Flash in Stop mode, fast wakeup time): 42 μA Typ @ 25C; 65 μA max @25 °C
- Stop (Flash in Deep power down mode, slow wakeup time): down to 9 μA @ 25 °C; 28 μA max @25 °C
- Standby: 1.8 μA @25 °C / 1.7 V without RTC; 11 μA @85 °C @1.7 V
- VBAT supply for RTC: 1 μA @25 °C
- 1×12-bit, 2.4 MSPS A/D converter: up to 16 channels
- General-purpose DMA: 16-stream DMA controllers with FIFOs and burst support
- Up to 11 timers: up to six 16-bit, two 32-bit timers up to 100 MHz, each with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input, two watchdog timers (independent and window) and a SysTick timer
- Debug mode
- Serial wire debug (SWD) & JTAG interfaces
- Cortex®-M4 Embedded Trace Macrocell™
- Up to 81 I/O ports with interrupt capability
- Up to 78 fast I/Os up to 100 MHz
- Up to 77 5 V-tolerant I/Os
- Up to 13 communication interfaces
- Up to 3 x I2C interfaces (SMBus/PMBus)
- Up to 3 USARTs (2 x 12.5 Mbit/s, 1 x 6.25 Mbit/s), ISO 7816 interface, LIN, IrDA, modem control)
- Up to 5 SPI/I2Ss (up to 50 Mbit/s, SPI or I2S audio protocol), SPI2 and SPI3 with muxed full-duplex I2S to achieve audio class accuracy via internal audio PLL or external clock
- SDIO interface (SD/MMC/eMMC)
- Advanced connectivity: USB 2.0 full-speed device/host/OTG controller with on-chip PHY
- CRC calculation unit
- 96-bit unique ID
- RTC: subsecond accuracy, hardware calendar
- All packages (WLCSP49, LQFP64/100, UFQFPN48, UFBGA100) are ECOPACK®2
